Odrive 3.6 Schematic May 2026

Finding the official ODrive v3.6 schematic can be slightly tricky because the v3.6 hardware is essentially identical to version 3.5. For technical reference, the ODrive team directs users to the v3.5 documentation on GitHub, which contains the relevant schematic PDF and 3D models. Key Technical Insights for v3.6

Hardware Parity: The main differences between v3.4, v3.5, and v3.6 are minor, such as different filter capacitors or the number of layers in the board.

Critical Components: If you are troubleshooting or repairing a board, the most common points of failure are the STM32 MCU and the DRV8301 pre-driver chips.

Voltage Warnings: For the 56V version, avoid exceeding 60V even for a moment, as this can cause avalanche breakdown in the chips. Using a pre-charge circuit or anti-spark connectors (like an XT90-S) is highly recommended to prevent inrush current damage.

Power Rails: If your board seems "dead," check the 3.3V and 5V power rails. If these are missing, you may have a blown voltage regulator or a shorted component elsewhere on that rail.

ODriveHardware/v3/v3.5docs/schematic_v3.5.pdf at ... - GitHub odrive 3.6 schematic

Provide feedback. We read every piece of feedback, and take your input very seriously.

Getting Started — ODrive Documentation 0.6.11 documentation

ODrive v3.6 is a high-performance open-source motor controller designed for high-power Field Oriented Control (FOC) of brushless DC motors. Apache NuttX 1. Hardware Architecture

The ODrive v3.6 schematic is built around two primary integrated circuits that handle the core logic and power management: Microcontroller: It uses the STMicro STM32F405RG

, an ARM Cortex-M4 chip that executes the control algorithms and manages communications. Gate Driver: It employs the Texas Instruments DRV8301 Finding the official ODrive v3

, which includes a dual-bridge gate driver and an integrated buck converter to provide 5V power (up to 1.5A) to the board's logic. ODrive Community 2. Schematic Subsystems

The board's circuitry is divided into several functional blocks: Power Stage:

Features dual motor outputs (M0 and M1) capable of 120A peak current per motor. It includes current shunt resistors (0.0005 ) for precise torque control. Brake Resistor Interface:

Dedicated "Aux" terminals are included for connecting a power resistor to dissipate energy during regenerative braking. Logic & Communication: Connects directly to the STM32 for configuration via the odrivetool CAN and UART:

High-speed interfaces for integration with external microcontrollers or automation systems. Shunt Resistors: On the schematic, look for R_SENSE_M0_A

Pins for encoders (ABI, Hall, or SPI), analog inputs, and PWM/Step/Dir control signals. 3. Key Pinout Details Chip Function GPIO 1 & 2 General Purpose I/O GPIO 3 & 4 Serial TX / RX for UART Voltage Monitoring (ADC) M0_AH/BH/CH TIM1 CH1-3 High-side gate control for Motor 0 4. Resources for Full Schematics

Official documentation and design files are maintained in the ODriveHardware GitHub repository PDF Schematic: Direct access to the circuit diagrams is available via the v3.5 Schematic (v3.6 is very similar with minor hardware refinements). 3D Models: CAD files for enclosure planning can be found on the ODrive OnShape page


4. Current Sensing (The Precision Secret)

The ODrive doesn’t measure motor current just by looking at the DC input. Instead, it measures the current in each phase individually using low-ohm shunt resistors placed between the low-side MOSFETs and ground.

4. Gate Drivers & Three-Phase Inverter (Per Motor)

This is the most complex and power-dense section. For each motor (M0 and M1), the schematic includes:

Heat Warning: The schematic does not show heatsinks, but it hints at their necessity by specifying copper pour areas under the MOSFETs.

4. DC Bus Input & Protection

1. Power Supply Architecture (The "Power Tree")

The schematic reveals a sophisticated multi-rail power system designed to handle high voltages (12V–56V) while generating clean low-voltage supplies for sensitive analog and digital components.

5. Feedback Interfaces (Encoders & Halls)

The schematic provides multiple input options: